Building “Up” for the Future
Since the inception of the integrated circuit, transistor designs have been flat structures constructed in a two-dimensional plane. As transistors have scaled down in size, so have their component parts, including the all-important “gate” which connects the channel separating the source from the drain. Voltage applied to the gate allows current to flow between source and drain. Physics, however, has affected the efficiency of transistors as manufacturers have scaled the structures to 3x nodes and below. When voltage is removed from the gate on these scaled-down structures, current can continue to flow, causing power to “leak” and to generate excess heat.
To solve this problem, chip designers have begun to develop and manufacture multi-gate transistors, gates which wrap around the transistor’s channel and more effectively turn on-and-off the flow of current. The new design promises not only lower power consumption but also improvements in device performance.
But manufacturing these transistors has proven challenging. In the most common multi-gate transistor design, known as FinFET, the channel connecting the source and drain is a thin fin which rises perpendicular from the substrate and can be less than 20 nanometers wide, with multiple thin films deposited over the surface. The fin structure and adjacent features can be extremely challenging to etch out of the silicon, requiring precise process control over the thickness, interfaces, and composition.
Nanometrics’ powerful Atlas OCD metrology system with the NanoCD Suite is a significant partner in bringing well controlled, high yield three-dimensional FinFET structures to production environments.
Nanometrics OCD technology allows manufacturers to make non-destructive measurements of film thickness, as well as the width, height, length, depth and pitch of structural features. These measurements can often be performed simultaneously on both the surface of a layer and in previous process layers below the surface. Three-dimensional structures, such as FinFET transistors benefit in particular from the system’s ability to measure additional features such as gate undercut, a measurement too challenging for most traditional metrology tools.
In addition, Nanometrics’ OCD tools are:
As an example of the power of the Atlas system with NanoCD Suite is shown below, using the system’s Mueller-Matrix capability (a way of gathering more measurement data about the system) to improve the overall measurement precision. By measuring more parameters, a much more accurate measurement of the device can be made. This also allows Nanometrics to measure unique properties of the structures, such as the absolute tilt or rotation of a surface.
Three-dimensional structures are now being developed and deployed at major DRAM, Flash and Logic manufacturing fabs. By providing a solution that addresses the challenges of three-dimensional metrology at smaller nodes while speeding time to results, Nanometrics OCD tools are making a major contribution to efficiently accelerate technology development and product roadmaps.